Intel Plots 14A2 Node With Dual-Side Power to Rival TSMC, Samsung 1.4nm Chips
Intel is reportedly weighing a new “14A2” process variant that would deliver power to chips from both the front and back sides of the wafer, an engineering workaround aimed at keeping its 1.4nm-class node competitive as TSMC and Samsung push their own next-generation chips. The plan, first detailed by Korean outlet ETNews and since corroborated by TrendForce, WccfTech and HotHardware, has not been officially confirmed by Intel.
What Dual-Side Power Delivery Would Change on 14A2
Intel’s baseline 14A node was already set to rely entirely on “PowerDirect,” the company’s next iteration of backside power delivery network (BSPDN) technology that routes electricity through the rear of the chip instead of competing for space with data lines on the front. According to ETNews, sources say the company originally planned to rely exclusively on its PowerDirect back-side power delivery network (BSPDN) for the baseline 14A node.
For the follow-up 14A2, though, Intel is now reportedly considering a dual-side architecture for the follow-on 14A2 process that combines both front-side and back-side power delivery. In practice, that means the chip’s backside network would stay the primary electrical pipeline, while Intel is said to have adopted a composite structure which uses BSPDN as the main power source but also allocates a portion to the front-side metal.
Why a 21nm Metal Pitch Is Forcing the Rethink
The driver behind the shift is Intel’s push to shrink its lowest metal interconnect layer, known as M0. The report says the architectural change is driven by lithography limitations as Intel pushes the pitch of its lowest metal layer (M0) to around 21nm, where stochastic defects become increasingly difficult to manage. That is a step down from the 28nm pitch planned for the base 14A node, according to the report.
Squeezing interconnects that tight has its own physics problem. As HotHardware explains it, once wires shrink to those dimensions, backside power delivery means having to use extremely tiny nano-Through-Silicon Via (nTSV) connections inside the chip. When the power delivery wires are so tiny, resistance increases, and thus voltage droops. Intel’s proposed answer is to lean on both sides of the wafer at once, easing the burden on those tiny through-silicon vias while still chasing the density gains a narrower pitch enables.
Those density gains matter for Intel’s foundry pitch to outside customers. ETNews believes that while for 14A, the M0 will be 28-nanometers, for 14A2, the pitch will drop down to 21-nanometers, and Intel has previously said its baseline 14A node already targets roughly 1.3x higher transistor density than 18A, with 14A2 expected to push that further.
Racing TSMC’s A14 and Samsung’s SF2Z to Market
The timing pressure is real. TSMC, having already hit its stride on 2nm, plans to ship commercial A14 (1.4nm) chips in 2028, right as Intel 14A enters risk production, while Samsung plans to launch SF2Z, its 2nm revision featuring backside power, in 2027. Samsung’s own 1.4nm-class SF1.4 node, meanwhile, is targeted for mass production in 2029, per additional reporting cited by TrendForce.
Analysts note Intel may face a harder integration path than Samsung on this front. Samsung is layering backside power onto a Gate-All-Around (GAA) architecture it has already refined across three generations, which might mean far less integration risk than Intel. Intel’s own 14A roadmap calls for entering risk production in 2028 and mass production in 2029, putting the 14A2 refinement on a tight parallel track with rivals’ commercial launches.
An Unconfirmed Roadmap With High Stakes for Intel Foundry
Every outlet covering the report is careful to flag that Intel itself has said nothing publicly about a 14A2 variant. As one analysis put it, Intel has not officially confirmed such a 14A Gen2 variant in this form to date. What is confirmed is the underlying 14A node itself, its PowerDirect backside power tech, and its RibbonFET 2 transistor architecture, all part of Intel’s push to win fabless customers back to its foundry business.
That customer courtship has a hard deadline attached. Intel reportedly needs to hand external partners a mature process design kit well ahead of any 14A2 refinement reaching silicon, since it aims to ship 14A0.9 design kits to customers in October 2026. Whether or not 14A2 materialises as described, the episode underlines how much of the modern chip race now hinges on power delivery engineering rather than headline nanometre figures alone, a shift that will eventually filter down into the CPUs and GPUs powering the next generation of gaming PCs and consoles.
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